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codegemma:7b | RAG off

06_reset_domain_crossing / task_60 | reset_sync_2ff

benchmarkilyasov
task_idilyasov/06_reset_domain_crossing/task_60
samples_total10
final_success_samples0
final_success_rate_samples0.0%
functional_pass_rate_samples0.0%
synth_pass_rate_samples0.0%
source_runsrun_20260427_200103_669320_45d5dc

Что показывает эта страница

Здесь перечислены все реальные попытки этой модели на одной задаче. По каждой попытке можно увидеть, до какой стадии она дошла, где именно сломалась и какое сообщение об ошибке вернулось из syntax, functional или synthesis.

Samples

sample run extract_ok syntax_ok functional_ok openlane_ok final_success failure_stage failure_reason details
sample_1 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_1
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt == 2) begin
                    srst_n <= 1;
                    rst_done <= 1;
                end else begin
                    rst_cnt <= rst_cnt + 1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_2 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_2
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 1'b0;
        end else if (!rst_done) begin
            if (rst_cnt == 2) begin
                srst_n <= 1'b1;
                rst_done <= 1;
            end else begin
                rst_cnt <= rst_cnt + 1;
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_3 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_3
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt == 2) begin
                    srst_n <= 1;
                    rst_done <= 1;
                end else begin
                    rst_cnt <= rst_cnt + 1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_4 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_4
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 1'b0;
        end else if (!rst_done) begin
            if (rst_cnt == 2) begin
                srst_n <= 1'b1;
                rst_done <= 1;
            end else begin
                rst_cnt <= rst_cnt + 1;
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_5 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_5
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt == 2) begin
                    srst_n <= 1;
                    rst_done <= 1;
                end else begin
                    rst_cnt <= rst_cnt + 1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_6 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_6
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 1'b0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt == 2) begin
                    srst_n <= 1'b1;
                    rst_done <= 1;
                end else begin
                    rst_cnt <= rst_cnt + 1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_7 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_7
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (!arst_n) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 1'b0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt == 2) begin
                    srst_n <= 1'b1;
                    rst_done <= 1'b1;
                end else begin
                    rst_cnt <= rst_cnt + 1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_8 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_8
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 1'b0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt == 2) begin
                    srst_n <= 1'b1;
                    rst_done <= 1;
                end else begin
                    rst_cnt <= rst_cnt + 1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_9 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_9
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (arst_n == 0) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 1'b0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt < 2) begin
                    rst_cnt <= rst_cnt + 1;
                end else begin
                    rst_done <= 1'b1;
                    srst_n <= 1'b1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}
sample_10 run_20260427_200103_669320_45d5dc ok ok failed failed failed functional Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.
Open details
sample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_60\samples\run_20260427_200103_669320_45d5dc__sample_10
generated.v preview 
module reset_sync_2ff(
    input clk,
    input arst_n,
    output reg srst_n
);

    reg rst_cnt;
    reg rst_done;

    always @(posedge clk) begin
        if (!arst_n) begin
            rst_cnt <= 0;
            rst_done <= 0;
            srst_n <= 1'b0;
        end else begin
            if (!rst_done) begin
                if (rst_cnt < 2) begin
                    rst_cnt <= rst_cnt + 1;
                end else begin
                    rst_done <= 1'b1;
                    srst_n <= 1'b1;
                end
            end
        end
    end

endmodule
functional details 
[stdout]
ERROR: reset was not asserted immediately.
ERROR: local reset did not deassert after two clock edges.
ERROR: restart sequence failed to release reset after two edges.
TEST_FAILED
/workspace/banchmarks/pashencev/06_reset_domain_crossing/task_60/tb.v:87: $finish called at 56000 (1ps)
synthesis details 
[error]
None
errors[] 
[
  {
    "stage": "functional",
    "code": "functional.output_failed_marker",
    "message": "Functional output contains failure marker: TEST_FAILED. ERROR: reset was not asserted immediately.",
    "retryable": false,
    "details": {
      "marker": "TEST_FAILED"
    }
  },
  {
    "stage": "openlane",
    "code": "openlane.invalidated_by_functional_failure",
    "message": "OpenLane result invalidated because functional validation failed after output-marker correction",
    "retryable": false,
    "details": {}
  }
]
outcome 
{
  "llm_ok": true,
  "extract_ok": true,
  "syntax_ok": true,
  "functional_ok": false,
  "openlane_ok": false,
  "syntax_required": true,
  "functional_required": true,
  "openlane_required": true,
  "final_success": false,
  "success": false
}