11_side_channel_constant_time / task_110 | consttime_word_compare
Здесь перечислены все реальные попытки этой модели на одной задаче. По каждой попытке можно увидеть, до какой стадии она дошла, где именно сломалась и какое сообщение об ошибке вернулось из syntax, functional или synthesis.
| sample | run | extract_ok | syntax_ok | functional_ok | openlane_ok | final_success | failure_stage | failure_reason | details |
|---|---|---|---|---|---|---|---|---|---|
| sample_1 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_1
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] latched_lhs, latched_rhs;
reg [3:0] comparison_cycle;
reg match_found;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
match_found <= 0;
end else begin
if (!busy && start) begin
busy <= 1;
latched_lhs <= lhs;
latched_rhs <= rhs;
comparison_cycle <= 0;
match_found <= 0;
end else if (busy) begin
if (comparison_cycle == 4) begin
done <= 1;
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_2 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_2
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] latched_lhs, latched_rhs;
reg [3:0] comparison_cycle;
reg match_found;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
match_found <= 0;
end else begin
if (!busy && start) begin
busy <= 1;
latched_lhs <= lhs;
latched_rhs <= rhs;
comparison_cycle <= 0;
match_found <= 0;
end else if (busy) begin
if (comparison_cycle == 4) begin
done <= 1;
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_3 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_3
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg, rhs_reg;
reg [3:0] comparison_stage;
reg match_result;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_stage <= 0;
lhs_reg <= 0;
rhs_reg <= 0;
end else begin
if (!busy && start) begin
busy <= 1;
lhs_reg <= lhs;
rhs_reg <= rhs;
comparison_stage <= 0;
end
if (comparison_stage < 4) begin
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_4 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_4
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] result;
reg [31:0] current_lhs, current_rhs;
reg [3:0] comparison_cycle;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
current_lhs <= 0;
current_rhs <= 0;
result <= 0;
end else begin
if (!busy) begin
if (start) begin
busy <= 1;
current_lhs <= lhs;
current_rhs <= rhs;
comparison_cycle <= 0;
end
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_5 | run_20260425_215014_451219_c08f66 | ok | failed | failed | skipped | failed | syntax | ison_cycle)+('sd1))) |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_5
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] compare_result;
reg [31:0] current_lhs, current_rhs;
reg [3:0] comparison_cycle;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
end else begin
if (!busy && start) begin
busy <= 1;
current_lhs <= lhs;
current_rhs <= rhs;
comparison_cycle <= 0;
end else if (busy) begin
if (comparison_cycle == 4'b1111) begin
done <= 1;
match <= compare_result == current_lhs;
busy <= 0;
...
syntax details[stderr]
ison_cycle)+('sd1)))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:35: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:35: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: : This lsb expression violates the rule: ('sd32)-(('sd8)*((comparison_cycle)+('sd1)))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))
20 error(s) during elaboration.
functional details[stderr]
/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This lsb expression violates the rule: ('sd32)-(('sd8)*((comparison_cycle)+('sd1)))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This lsb expression violates the rule: ('sd32)-(('sd8)*((comparison_cycle)+('sd1)))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:36: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:36: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:36: : This lsb expression violates the rule: ('sd32)-(('sd8)*((comparison_cycle)+('sd1)))
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:36: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:36: error: Part select expressions must be constant.
/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:36: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))
20 error(s) during elaboration.
synthesis details[error] None errors[][
{
"stage": "syntax",
"code": "syntax.iverilog_failed",
"message": "ison_cycle)+('sd1)))\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:35: error: Part select expressions must be constant.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:35: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: Part select expressions must be constant.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: : This lsb expression violates the rule: ('sd32)-(('sd8)*((comparison_cycle)+('sd1)))\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: error: Part select expressions must be constant.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/generated.v:36: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))\n20 error(s) during elaboration.\n",
"retryable": false,
"details": {}
},
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This lsb expression violates the rule: ('sd32)-(('sd8)*((comparison_cycle)+('sd1)))\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This lsb expression violates the rule: ('sd32)-(('sd8)*((comparison_cycle)+('sd1)))\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: A reference to a wire or reg (`comparison_cycle') is not allowed in a constant expression.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: error: Part select expressions must be constant.\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:35: : This msb expression violates the rule: ('sd31)-(('sd8)*(comparison_cycle))\n/data/eval/out/run_20260425_215014_451219_c08f66/tmp/codegemma/pashencev__11_side_channel_constant_time__task_110/sample_5/functional/generated.v:36: er…
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": false,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_6 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_6
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] latched_lhs, latched_rhs;
reg [3:0] comparison_stage;
reg match_result;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_stage <= 0;
latched_lhs <= 0;
latched_rhs <= 0;
end else begin
if (!busy && start) begin
busy <= 1;
latched_lhs <= lhs;
latched_rhs <= rhs;
comparison_stage <= 0;
end
if (comparison_stage < 4) begin
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_7 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_7
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] current_lhs, current_rhs;
reg [3:0] comparison_cycle;
reg match_found;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
match_found <= 0;
end else begin
if (!busy && start) begin
busy <= 1;
current_lhs <= lhs;
current_rhs <= rhs;
comparison_cycle <= 0;
match_found <= 0;
end else if (busy) begin
if (comparison_cycle == 4) begin
done <= 1;
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_8 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_8
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] result;
reg [31:0] compare_lhs;
reg [31:0] compare_rhs;
reg [3:0] comparison_cycle;
always @(posedge clk) begin
if (rst_n == 0) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
end else begin
if (start && !busy) begin
busy <= 1;
compare_lhs <= lhs;
compare_rhs <= rhs;
comparison_cycle <= 0;
end
if (comparison_cycle < 4) begin
result <= (compare_lhs[31-comparison_cycle] ^ compare_rhs[31-comparison_cycle]);
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (equal words): match=1 expected=0 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=1 expected=0 ERROR (equal words): match=1 expected=0 ERROR (equal words): busy=0 expected=1 ERROR (return to idle): done=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): busy=0 expected=1 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): match=1 expected=0 ERROR (return to idle): done=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): busy=0 expected=1 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=1 expected=0 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_9 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_9
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] result;
reg [31:0] current_lhs, current_rhs;
reg [3:0] comparison_cycle;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
end else begin
if (!busy && start) begin
busy <= 1;
current_lhs <= lhs;
current_rhs <= rhs;
comparison_cycle <= 0;
end else begin
if (comparison_cycle == 4'b1111) begin
done <= 1;
match <= (result == current_lhs);
end else begin
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_10 | run_20260425_215014_451219_c08f66 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\codegemma-7b\rag_on\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260425_215014_451219_c08f66__sample_10
generated.v previewmodule consttime_word_compare(
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] result;
reg [31:0] current_lhs;
reg [31:0] current_rhs;
reg [3:0] comparison_cycle;
always @(posedge clk) begin
if (rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
comparison_cycle <= 0;
end else begin
if (!busy) begin
if (start) begin
busy <= 1;
current_lhs <= lhs;
current_rhs <= rhs;
comparison_cycle <= 0;
end
end else begin
if (comparison_cycle == 4) begin
...
functional details[stdout] ERROR (reset asserted): busy=x expected=0 ERROR (reset asserted): done=x expected=0 ERROR (reset asserted): match=x expected=0 ERROR (accept request): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): busy=0 expected=1 ERROR (equal words): done=0 expected=1 ERROR (equal words): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte0): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (mismatch byte2): done=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (ignore busy start): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start progress): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (ignore busy start result): done=0 expected=1 ERROR (ignore busy start result): match=0 expected=1 ERROR (accept request): busy=0 expected=1 ERROR (mid-transaction before reset): busy=0 expected=1 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (reset asserted): busy=x expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|