03_low_power_design / task_34 | soc_top
Здесь перечислены все реальные попытки этой модели на одной задаче. По каждой попытке можно увидеть, до какой стадии она дошла, где именно сломалась и какое сообщение об ошибке вернулось из syntax, functional или synthesis.
| sample | run | extract_ok | syntax_ok | functional_ok | openlane_ok | final_success | failure_stage | failure_reason | details |
|---|---|---|---|---|---|---|---|---|---|
| sample_1 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_1
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate AON Controller
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate Power-Down DSP Domain
pd_dsp pd_inst (
.clk(clk),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller Module
module aon_ctrl (
input clk,
input rst_n,
...
functional details[stdout] ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: Wake Up failed to resolve. Expected pwr_enable=1, iso_en=0. TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_2 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: UPF Power Down Sequence Flaw! Missing isolation safety step. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_2
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate AON Controller
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate Power-Down DSP Domain
pd_dsp pd_inst (
.clk(clk),
.rst_n(rst_n),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller Module
module aon_ctrl (
input clk,
...
functional details[stdout] ERROR: UPF Power Down Sequence Flaw! Missing isolation safety step. Expected: pwr_enable=1, iso_en=1 Got: pwr_enable=1, iso_en=0 ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: UPF Wake-Up Sequence Flaw! Isolation dropped prematurely. Expected: pwr_enable=1, iso_en=1 Got: pwr_enable=1, iso_en=0 TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: UPF Power Down Sequence Flaw! Missing isolation safety step.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_3 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_3
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
reg [31:0] reg_data_out;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
reg_data_out <= 32'b0;
end else if (sleep_req) begin
// Power down sequence
reg_data_out <= data_in;
end else begin
// Normal operation or wake up sequence
reg_data_out <= data_in;
end
end
assign data_out = reg_data_out;
aon_ctrl aon (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
...
functional details[stdout] ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: UPF Wake-Up Sequence Flaw! Isolation dropped prematurely. Expected: pwr_enable=1, iso_en=1 Got: pwr_enable=1, iso_en=0 TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_4 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: UPF Power Down Sequence Flaw! Missing isolation safety step. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_4
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate AON Controller
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate Power-Down DSP Domain
pd_dsp pd_inst (
.clk(clk),
.rst_n(rst_n),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller Module
module aon_ctrl (
input clk,
...
functional details[stdout] ERROR: UPF Power Down Sequence Flaw! Missing isolation safety step. Expected: pwr_enable=1, iso_en=1 Got: pwr_enable=1, iso_en=0 ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: UPF Wake-Up Sequence Flaw! Isolation dropped prematurely. Expected: pwr_enable=1, iso_en=1 Got: pwr_enable=1, iso_en=0 TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: UPF Power Down Sequence Flaw! Missing isolation safety step.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_5 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_5
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate AON Controller
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate Power-Down DSP Domain
pd_dsp pd_inst (
.clk(clk),
.rst_n(rst_n),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller module
module aon_ctrl (
input clk,
...
functional details[stdout] ERROR: Bad reset state. Expected pwr=1, iso=0 ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: Wake Up failed to resolve. Expected pwr_enable=1, iso_en=0. TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_6 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_6
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate the AON Controller module
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate the Power-Down DSP module
pd_dsp pd_inst (
.clk(clk),
.rst_n(rst_n),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller module
module aon_ctrl (
input clk,
...
functional details[stdout] ERROR: Bad reset state. Expected pwr=1, iso=0 ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: Wake Up failed to resolve. Expected pwr_enable=1, iso_en=0. TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_7 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_7
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate AON Controller
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate Power-Down DSP Domain
pd_dsp pd_inst (
.clk(clk),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller Module
module aon_ctrl (
input clk,
input rst_n,
...
functional details[stdout] ERROR: Bad reset state. Expected pwr=1, iso=0 ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: Wake Up failed to resolve. Expected pwr_enable=1, iso_en=0. TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_8 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_8
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate the AON Controller module
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate the Power-Down DSP module
pd_dsp pd_inst (
.clk(clk),
.rst_n(rst_n),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller module
module aon_ctrl (
input clk,
...
functional details[stdout] ERROR: Bad reset state. Expected pwr=1, iso=0 ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: Wake Up failed to resolve. Expected pwr_enable=1, iso_en=0. TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_9 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_9
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
// Instantiate the AON Controller module
aon_ctrl aon_inst (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
// Instantiate the Power-Down DSP module
pd_dsp pd_inst (
.clk(clk),
.rst_n(rst_n),
.data_in(data_in),
.data_out(data_out)
);
endmodule
// AON Controller module
module aon_ctrl (
input clk,
...
functional details[stdout] ERROR: Bad reset state. Expected pwr=1, iso=0 ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: Wake Up failed to resolve. Expected pwr_enable=1, iso_en=0. TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Bad reset state. Expected pwr=1, iso=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_10 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\deepseek-coder-v2-16b\rag_off\benchmarks\ilyasov\tasks\ilyasov__03_low_power_design__task_34\samples\run_20260427_102437_171676_163c0c__sample_10
generated.v previewmodule soc_top (
input clk,
input rst_n,
input sleep_req,
input [31:0] data_in,
output [31:0] data_out,
output pwr_enable,
output iso_en
);
reg [31:0] reg_data_out;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
reg_data_out <= 32'b0;
end else if (sleep_req) begin
// Power down sequence
reg_data_out <= data_in;
end else begin
// Normal operation or wake up sequence
reg_data_out <= data_in;
end
end
assign data_out = reg_data_out;
aon_ctrl aon (
.clk(clk),
.rst_n(rst_n),
.sleep_req(sleep_req),
.pwr_enable(pwr_enable),
.iso_en(iso_en)
);
...
functional details[stdout] ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1. ERROR: UPF Wake-Up Sequence Flaw! Isolation dropped prematurely. Expected: pwr_enable=1, iso_en=1 Got: pwr_enable=1, iso_en=0 TEST_FAILED /workspace/banchmarks/pashencev/03_low_power_design/task_34/tb.v:95: $finish called at 86000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: Power Down failed. Expected pwr_enable=0, iso_en=1.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|