06_reset_domain_crossing / task_61 | ordered_reset_ctrl
Здесь перечислены все реальные попытки этой модели на одной задаче. По каждой попытке можно увидеть, до какой стадии она дошла, где именно сломалась и какое сообщение об ошибке вернулось из syntax, functional или synthesis.
| sample | run | extract_ok | syntax_ok | functional_ok | openlane_ok | final_success | failure_stage | failure_reason | details |
|---|---|---|---|---|---|---|---|---|---|
| sample_1 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_1
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_r;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_b_ff1;
reg ready_b_ff2;
wire a_ready;
assign a_ready = rst_a_n_r & a_init_done;
assign rst_a_n = rst_a_n_r;
assign rst_b_n = ready_b_ff2;
// Domain A: async assert, sync deassert with 2-flop synchronizer
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
rst_a_n_r <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_r <= sync_a_ff2;
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_2 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_2
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg [1:0] a_sync_arst_n;
reg rst_a_n_r;
reg [1:0] b_sync_ready;
reg rst_b_n_r;
wire a_ready;
wire b_ready_sync;
assign rst_a_n = rst_a_n_r;
assign rst_b_n = rst_b_n_r;
// Domain A: 2-flop synchronizer for async reset deassertion
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
a_sync_arst_n <= 2'b00;
rst_a_n_r <= 1'b0;
end else begin
a_sync_arst_n <= {a_sync_arst_n[0], 1'b1};
rst_a_n_r <= a_sync_arst_n[1];
end
end
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. ERROR: domain B did not release after the second clk_b stage. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_3 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_3
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_r;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_b_ff1;
reg ready_b_ff2;
wire a_ready = rst_a_n_r & a_init_done;
assign rst_a_n = rst_a_n_r;
assign rst_b_n = ready_b_ff2;
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
rst_a_n_r <= 1'b0;
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_r <= sync_a_ff2;
end
end
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_4 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_4
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_r;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_a_ff1;
reg ready_a_ff2;
wire ready_a;
assign ready_a = rst_a_n_r & a_init_done;
// Domain A reset synchronizer (2-flop)
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
rst_a_n_r <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_r <= sync_a_ff2;
end
end
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_5 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_5
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_r;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_b_ff1;
reg ready_b_ff2;
wire a_ready;
assign a_ready = rst_a_n_r & a_init_done;
assign rst_a_n = rst_a_n_r;
assign rst_b_n = ready_b_ff2;
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
rst_a_n_r <= 1'b0;
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_r <= sync_a_ff2;
end
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_6 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_6
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_r;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_b_ff1;
reg ready_b_ff2;
wire a_ready;
assign a_ready = rst_a_n_r & a_init_done;
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
rst_a_n_r <= 1'b0;
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_r <= sync_a_ff2;
end
end
always @(posedge clk_b or negedge arst_n) begin
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_7 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_7
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_r;
reg a_sync_ff1;
reg a_sync_ff2;
reg b_sync_ff1;
reg b_sync_ff2;
wire a_ready;
assign a_ready = rst_a_n_r & a_init_done;
// Domain A reset synchronizer (2-flop) for arst_n
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
rst_a_n_r <= 1'b0;
end else begin
// 2-flop synchronizer for deassertion:
// rst_a_n_r is driven by the second stage.
// Implemented as a 2-stage shift register using a_sync_ff1/a_sync_ff2.
a_sync_ff1 <= 1'b1;
a_sync_ff2 <= a_sync_ff1;
rst_a_n_r <= a_sync_ff2;
end
end
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_8 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_8
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_reg;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_a_ff1;
reg ready_a_ff2;
wire ready_a;
assign ready_a = rst_a_n_reg & a_init_done;
assign rst_a_n = rst_a_n_reg;
assign rst_b_n = ready_a_ff2;
// Domain A reset synchronizer (2-flop)
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
rst_a_n_reg <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_reg <= sync_a_ff2;
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_9 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_9
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_reg;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_b_ff1;
reg ready_b_ff2;
wire a_ready;
assign a_ready = rst_a_n_reg & a_init_done;
assign rst_a_n = rst_a_n_reg;
assign rst_b_n = ready_b_ff2;
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
rst_a_n_reg <= 1'b0;
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_reg <= sync_a_ff2;
end
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_10 | run_20260427_102437_171676_163c0c | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges. |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\gpt-5-4-nano\rag_off\benchmarks\ilyasov\tasks\ilyasov__06_reset_domain_crossing__task_61\samples\run_20260427_102437_171676_163c0c__sample_10
generated.v previewmodule ordered_reset_ctrl (
input clk_a,
input clk_b,
input arst_n,
input a_init_done,
output rst_a_n,
output rst_b_n
);
reg rst_a_n_r;
reg sync_a_ff1;
reg sync_a_ff2;
reg ready_a_ff1;
reg ready_a_ff2;
wire ready_a;
assign ready_a = rst_a_n_r & a_init_done;
always @(posedge clk_a or negedge arst_n) begin
if (!arst_n) begin
rst_a_n_r <= 1'b0;
sync_a_ff1 <= 1'b0;
sync_a_ff2 <= 1'b0;
end else begin
sync_a_ff1 <= 1'b1;
sync_a_ff2 <= sync_a_ff1;
rst_a_n_r <= sync_a_ff2;
end
end
...
functional details[stdout] ERROR: domain A did not release reset after two clk_a edges. TEST_FAILED /workspace/banchmarks/pashencev/06_reset_domain_crossing/task_61/tb.v:106: $finish called at 78000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR: domain A did not release reset after two clk_a edges.",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|