11_side_channel_constant_time / task_110 | consttime_word_compare
Здесь перечислены все реальные попытки этой модели на одной задаче. По каждой попытке можно увидеть, до какой стадии она дошла, где именно сломалась и какое сообщение об ошибке вернулось из syntax, functional или synthesis.
| sample | run | extract_ok | syntax_ok | functional_ok | openlane_ok | final_success | failure_stage | failure_reason | details |
|---|---|---|---|---|---|---|---|---|---|
| sample_1 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (post reset idle): done=1 expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_1
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 1'b0;
done <= 1'b0;
match <= 1'b0;
cycle_count <= 2'b00;
lhs_reg <= 32'h0;
rhs_reg <= 32'h0;
compare_match <= 1'b1;
end else begin
if (start && !busy) begin
busy <= 1'b1;
done <= 1'b0;
match <= 1'b0;
cycle_count <= 2'b01;
lhs_reg <= lhs;
...
functional details[stdout] ERROR (post reset idle): done=1 expected=0 ERROR (post reset idle): match=1 expected=0 ERROR (equal words): busy=0 expected=1 ERROR (return to idle): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (idle after ignored start): match=1 expected=0 ERROR (idle after reset recovery): done=1 expected=0 ERROR (idle after reset recovery): match=1 expected=0 ERROR (final mismatch): busy=0 expected=1 TEST_FAILED /workspace/banchmarks/pashencev/11_side_channel_constant_time/task_110/tb.v:161: $finish called at 356000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (post reset idle): done=1 expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_2 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_2
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
busy <= 1;
done <= 0;
match <= 0;
lhs_reg <= lhs;
rhs_reg <= rhs;
cycle_count <= 0;
compare_match <= 1;
...
functional details[stdout] ERROR (equal words): busy=0 expected=1 ERROR (return to idle): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (idle after ignored start): match=1 expected=0 ERROR (final mismatch): busy=0 expected=1 TEST_FAILED /workspace/banchmarks/pashencev/11_side_channel_constant_time/task_110/tb.v:161: $finish called at 356000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_3 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_3
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
busy <= 1;
done <= 0;
match <= 0;
lhs_reg <= lhs;
rhs_reg <= rhs;
cycle_count <= 0;
compare_match <= 1;
...
functional details[stdout] ERROR (equal words): busy=0 expected=1 ERROR (return to idle): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (idle after ignored start): match=1 expected=0 ERROR (final mismatch): busy=0 expected=1 TEST_FAILED /workspace/banchmarks/pashencev/11_side_channel_constant_time/task_110/tb.v:161: $finish called at 356000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_4 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (return to idle): busy=1 expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_4
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
lhs_reg <= lhs;
rhs_reg <= rhs;
busy <= 1;
done <= 0;
cycle_count <= 0;
compare_match <= 1;
end else if (busy) begin
...
functional details[stdout] ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): done=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): done=0 expected=1 ERROR (mismatch byte0): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (ignore busy start): match=1 expected=0 ERROR (ignore busy start progress): done=1 expected=0 ERROR (ignore busy start progress): match=1 expected=0 ERROR (ignore busy start progress): match=1 expected=0 ERROR (ignore busy start result): done=0 expected=1 ERROR (idle after ignored start): busy=1 expected=0 ERROR (idle after ignored start): match=1 expected=0 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mid-transaction before reset): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (return to idle): busy=1 expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_5 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (return to idle): busy=1 expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_5
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
lhs_reg <= lhs;
rhs_reg <= rhs;
busy <= 1;
done <= 0;
cycle_count <= 0;
compare_match <= 1;
end else if (busy) begin
...
functional details[stdout] ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): done=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): done=0 expected=1 ERROR (mismatch byte0): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (ignore busy start): match=1 expected=0 ERROR (ignore busy start progress): done=1 expected=0 ERROR (ignore busy start progress): match=1 expected=0 ERROR (ignore busy start progress): match=1 expected=0 ERROR (ignore busy start result): done=0 expected=1 ERROR (idle after ignored start): busy=1 expected=0 ERROR (idle after ignored start): match=1 expected=0 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mid-transaction before reset): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (return to idle): busy=1 expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_6 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_6
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
lhs_reg <= lhs;
rhs_reg <= rhs;
busy <= 1;
done <= 0;
cycle_count <= 0;
compare_match <= 1;
end else if (busy) begin
...
functional details[stdout] ERROR (equal words): busy=0 expected=1 ERROR (return to idle): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (idle after ignored start): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mid-transaction before reset): match=1 expected=0 ERROR (final mismatch): busy=0 expected=1 TEST_FAILED /workspace/banchmarks/pashencev/11_side_channel_constant_time/task_110/tb.v:161: $finish called at 356000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_7 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (return to idle): busy=1 expected=0 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_7
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
lhs_reg <= lhs;
rhs_reg <= rhs;
busy <= 1;
done <= 0;
cycle_count <= 0;
compare_match <= 1;
end else if (busy) begin
...
functional details[stdout] ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): done=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): match=1 expected=0 ERROR (mismatch byte0): done=0 expected=1 ERROR (mismatch byte0): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (mismatch byte2): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ERROR (return to idle): match=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (ignore busy start): match=1 expected=0 ERROR (ignore busy start progress): done=1 expected=0 ERROR (ignore busy start progress): match=1 expected=0 ERROR (ignore busy start progress): match=1 expected=0 ERROR (ignore busy start result): done=0 expected=1 ERROR (idle after ignored start): busy=1 expected=0 ERROR (idle after ignored start): match=1 expected=0 ERROR (accept request): done=1 expected=0 ERROR (accept request): match=1 expected=0 ERROR (mid-transaction before reset): match=1 expected=0 ERROR (return to idle): busy=1 expected=0 ... synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (return to idle): busy=1 expected=0",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_8 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_8
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
busy <= 1;
done <= 0;
match <= 0;
lhs_reg <= lhs;
rhs_reg <= rhs;
cycle_count <= 0;
compare_match <= 1;
...
functional details[stdout] ERROR (equal words): busy=0 expected=1 ERROR (return to idle): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (idle after ignored start): match=1 expected=0 ERROR (final mismatch): busy=0 expected=1 TEST_FAILED /workspace/banchmarks/pashencev/11_side_channel_constant_time/task_110/tb.v:161: $finish called at 356000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_9 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_9
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
busy <= 1;
done <= 0;
match <= 0;
lhs_reg <= lhs;
rhs_reg <= rhs;
cycle_count <= 0;
compare_match <= 1;
...
functional details[stdout] ERROR (equal words): busy=0 expected=1 ERROR (return to idle): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (idle after ignored start): match=1 expected=0 ERROR (final mismatch): busy=0 expected=1 TEST_FAILED /workspace/banchmarks/pashencev/11_side_channel_constant_time/task_110/tb.v:161: $finish called at 356000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_10 | run_20260426_175047_007550_9b8266 | ok | ok | failed | failed | failed | functional | Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1 |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\ilyasov\tasks\ilyasov__11_side_channel_constant_time__task_110\samples\run_20260426_175047_007550_9b8266__sample_10
generated.v previewmodule consttime_word_compare (
input clk,
input rst_n,
input start,
input [31:0] lhs,
input [31:0] rhs,
output reg busy,
output reg done,
output reg match
);
reg [31:0] lhs_reg;
reg [31:0] rhs_reg;
reg [1:0] cycle_count;
reg compare_match;
always @(posedge clk or negedge rst_n) begin
if (!rst_n) begin
busy <= 0;
done <= 0;
match <= 0;
cycle_count <= 0;
compare_match <= 1;
end else begin
if (start && !busy) begin
busy <= 1;
done <= 0;
match <= 0;
lhs_reg <= lhs;
rhs_reg <= rhs;
cycle_count <= 0;
compare_match <= 1;
...
functional details[stdout] ERROR (equal words): busy=0 expected=1 ERROR (return to idle): match=1 expected=0 ERROR (mismatch byte0): busy=0 expected=1 ERROR (mismatch byte2): busy=0 expected=1 ERROR (ignore busy start result): busy=0 expected=1 ERROR (idle after ignored start): match=1 expected=0 ERROR (final mismatch): busy=0 expected=1 TEST_FAILED /workspace/banchmarks/pashencev/11_side_channel_constant_time/task_110/tb.v:161: $finish called at 356000 (1ps) synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.output_failed_marker",
"message": "Functional output contains failure marker: TEST_FAILED. ERROR (equal words): busy=0 expected=1",
"retryable": false,
"details": {
"marker": "TEST_FAILED"
}
},
{
"stage": "openlane",
"code": "openlane.invalidated_by_functional_failure",
"message": "OpenLane result invalidated because functional validation failed after output-marker correction",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|