13_rtllm_memory / task_05 | verified_right_shifter
Здесь перечислены все реальные попытки этой модели на одной задаче. По каждой попытке можно увидеть, до какой стадии она дошла, где именно сломалась и какое сообщение об ошибке вернулось из syntax, functional или synthesis.
| sample | run | extract_ok | syntax_ok | functional_ok | openlane_ok | final_success | failure_stage | failure_reason | details |
|---|---|---|---|---|---|---|---|---|---|
| sample_1 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_1
generated.v previewmodule verified_right_shifter (
input clk,
input d,
output reg [7:0] q
);
initial begin
q = 8'b0;
end
always @(posedge clk) begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_2 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_2
generated.v previewmodule verified_right_shifter (
input clk,
input d,
output reg [7:0] q
);
always @(posedge clk) begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_3 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_3
generated.v previewmodule verified_right_shifter(
input clk,
input d,
output reg [7:0] q
);
initial
begin
q = 8'b0;
end
always @(posedge clk)
begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_4 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_4
generated.v previewmodule verified_right_shifter(
input clk,
input d,
output reg [7:0] q
);
initial
begin
q = 8'b0;
end
always @(posedge clk)
begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_5 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_5
generated.v previewmodule verified_right_shifter(
input clk,
input d,
output reg [7:0] q
);
initial
begin
q = 8'b0;
end
always @(posedge clk)
begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_6 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_6
generated.v previewmodule verified_right_shifter (
input clk,
input d,
output reg [7:0] q
);
always @(posedge clk) begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_7 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_7
generated.v previewmodule verified_right_shifter(
input clk,
input d,
output reg [7:0] q
);
initial
begin
q = 8'b0;
end
always @(posedge clk)
begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_8 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_8
generated.v previewmodule verified_right_shifter (
input clk,
input d,
output reg [7:0] q
);
always @(posedge clk) begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_9 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_9
generated.v previewmodule verified_right_shifter (
input clk,
input d,
output reg [7:0] q
);
always @(posedge clk) begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|
| sample_10 | run_20260426_175047_007550_9b8266 | ok | ok | failed | skipped | failed | functional | /workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter |
Open detailssample_dir: E:\Work\MIEM\VKR\Analyse\data\model_dataset\models\qwen3-coder-30b\rag_off\benchmarks\rtllm\tasks\rtllm__13_rtllm_memory__task_05\samples\run_20260426_175047_007550_9b8266__sample_10
generated.v previewmodule verified_right_shifter (
input clk,
input d,
output reg [7:0] q
);
always @(posedge clk) begin
q <= (q >> 1);
q[7] <= d;
end
endmodule
functional details[stderr]
/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter
3 error(s) during elaboration.
*** These modules were missing:
right_shifter referenced 1 times.
***
synthesis details[error] None errors[][
{
"stage": "functional",
"code": "functional.testbench_failed",
"message": "/workspace/banchmarks/rtllm/13_rtllm_memory/task_05/tb.v:8: error: Unknown module type: right_shifter\n3 error(s) during elaboration.\n*** These modules were missing:\n right_shifter referenced 1 times.\n***\n",
"retryable": false,
"details": {}
}
]
outcome{
"llm_ok": true,
"extract_ok": true,
"syntax_ok": true,
"functional_ok": false,
"openlane_ok": false,
"syntax_required": true,
"functional_required": true,
"openlane_required": true,
"final_success": false,
"success": false
}
|